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ltc6652 1 6652fe for more information www.linear.com/6652 features a pplications description precision low drift low noise buffered reference the lt c ? 6652 family of precision, low drift, low noise references is fully specifed over the temperature range of C 40c to 125c. high order curvature compensation allows these references to achieve a low drift of less than 5ppm/c with a predictable temperature characteristic and an output voltage accuracy of 0.05%. the performance over temperature should appeal to automotive, high perfor - mance industrial and other high temperature applications. the ltc6652 voltage references can be powered from supply voltages up to 13.2v. they boast low noise, ex - cellent load regulation, source and sink capability and exceptional line rejection, making them a superior choice for demanding precision applications. a shutdown mode allows power consumption to be reduced when the refer - ence is not needed. the optional output capacitor can be left off when space constraints are critical. the ltc6652 references are offered in an 8-lead msop package and an 8-lead ls8 package. the ls8 is a 5mm 5mm surface mount hermetic package that provides outstanding stability. l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. output voltage temperature drift n low drift: a-grade 5ppm/c max b-grade 10ppm/c max (msop8) b-grade 8ppm/c max (ls8) n high accuracy: a grade 0.05% max b-grade 0.1% max n low noise: 2.1ppm p-p (0.1hz to 10hz) n 100% tested at C 40c, 25c and 125c n sinks and sources current: 5ma n low power shutdown: <2a maximum n thermal hysteresis (ls8): 45ppm (C 40c to 125c) n long-term drift (ls8): 20ppm/ khr n low dropout: 300mv n available output voltage options: 1.25v , 2.048v, 2.5v, 3v, 3.3v, 4.096v, 5v n 8-lead msop and 5mm 5mm surface mount hermetic packages n automotive control and monitoring n high temperature industrial n high resolution data acquisition systems n instrumentation and process control n precision regulators n medical equipment basic connection t ypical a pplication temperature (c) ?40 ?0.050 v out accuracy (%) ?0.025 0 0.025 0.050 ?20 0 20 40 6652 ta01b 60 80 100 125 2.8v v in 13.2v c in 0.1f (optional) c out 1f (optional) v out 2.5v 6652 ta01a ltc6652-2.5 v out v in gnd shdn
ltc6652 2 6652fe for more information www.linear.com/6652 a bsolute maxi m u m r atings input voltage v in to gnd .......................................... C0.3v to 13.2v shdn to gnd ............................ C 0.3v to (v in + 0.3v) output voltage v out ........................................... C0.3v to (v in + 0.3v) output short-circuit duration ...................... indefnite operating temperature range ................ C 40c to 125c storage temperature range (note 2) ..... C 65c to 150c lead temperature range (soldering, 10 sec) (note 9) ............................................................. 300c 1 2 3 4 dnc v in shdn gnd 8 7 6 5 gnd* gnd* v out gnd* top view ms8 package 8-lead plastic msop t jmax = 150c, ja = 200c/w dnc: do not connect *connect the pins to device gnd (pin 4) 1 2 3 dnc v in shdn 7 6 5 gnd* v out gnd* 4 gnd 8 gnd* top view ls8 package 8-pin leadless chip carrier (5mm 5mm) t jmax = 150c, ja = 120c/w dnc: do not connect *connect the pins to device gnd (pin 4) o r d er i n f or m ation lead free finish tape and reel part marking package description specified temperature range ltc6652ahms8-1.25#pbf ltc6652ahms8-1.25#trpbf ltcvh 8-lead plastic msop C40c to 125c ltc6652bhms8-1.25#pbf ltc6652bhms8-1.25#trpbf ltcvh 8-lead plastic msop C40c to 125c ltc6652ahms8-2.048#pbf ltc6652ahms8-2.048#trpbf ltcvj 8-lead plastic msop C40c to 125c ltc6652bhms8-2.048#pbf ltc6652bhms8-2.048#trpbf ltcvj 8-lead plastic msop C40c to 125c ltc6652ahms8-2.5#pbf ltc6652ahms8-2.5#trpbf ltcqv 8-lead plastic msop C40c to 125c ltc6652bhms8-2.5#pbf ltc6652bhms8-2.5#trpbf ltcqv 8-lead plastic msop C40c to 125c ltc6652ahms8-3#pbf ltc6652ahms8-3#trpbf ltcvk 8-lead plastic msop C40c to 125c ltc6652bhms8-3#pbf ltc6652bhms8-3#trpbf ltcvk 8-lead plastic msop C40c to 125c ltc6652ahms8-3.3#pbf ltc6652ahms8-3.3#trpbf ltcvm 8-lead plastic msop C40c to 125c ltc6652bhms8-3.3#pbf ltc6652bhms8-3.3#trpbf ltcvm 8-lead plastic msop C40c to 125c ltc6652ahms8-4.096#pbf ltc6652ahms8-4.096#trpbf ltcvn 8-lead plastic msop C40c to 125c ltc6652bhms8-4.096#pbf ltc6652bhms8-4.096#trpbf ltcvn 8-lead plastic msop C40c to 125c ltc6652ahms8-5#pbf ltc6652ahms8-5#trpbf ltcvp 8-lead plastic msop C40c to 125c ltc6652bhms8-5#pbf ltc6652bhms8-5#trpbf ltcvp 8-lead plastic msop C40c to 125c p in c on f iguration n
ltc6652 3 6652fe for more information www.linear.com/6652 output voltage initial accuracy temperature coefficient part number** 1.250 0.05% 0.1% 5ppm/c 10ppm/c ltc6652ahms8-1.25 ltc6652bhms8-1.25 2.048 0.05% 0.1% 5ppm/c 10ppm/c ltc6652ahms8-2.048 ltc6652bhms8-2.048 2.500 0.05% 0.1% 0.05% 0.1% 5ppm/c 10ppm/c 5ppm/c 8ppm/c ltc6652ahms8-2.5 ltc6652bhms8-2.5 ltc6652ahls8-2.5 ltc6652bhls8-2.5 3.000 0.05% 0.1% 5ppm/c 10ppm/c ltc6652ahms8-3 ltc6652bhms8-3 3.300 0.05% 0.1% 5ppm/c 10ppm/c ltc6652ahms8-3.3 ltc6652bhms8-3.3 4.096 0.05% 0.1% 5ppm/c 10ppm/c ltc6652ahms8-4.096 ltc6652bhms8-4.096 5.000 0.05% 0.1% 5ppm/c 10ppm/c ltc6652ahms8-5 ltc6652bhms8-5 **see order information section for complete part number listing. a vailable o ptions e lectrical c haracteristics the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c, v in = v out + 0.5v, unless otherwise noted. parameter conditions min typ max units output voltage ltc6652a ltc6652b C0.05 C0.1 0.05 0.1 % % output voltage temperature coeffcient (note 3) ltc6652a ltc6652bms8 ltc6652bls8 l l 2 4 4 5 10 8 ppm/c ppm/c ppm/c line regulation v out + 0.5v v in 13.2v, shdn = v in l 2 50 80 ppm/v ppm/v load regulation (note 4) i source = 5ma, ltc6652-1.25, ltc6652-2.048, ltc6652-2.5, ltc6652-3, ltc6652-3.3, ltc6652-4.096, ltc6652-5 l 20 75 200 ppm/ma ppm/ma i sink = 1ma, ltc6652-1.25, ltc6652-2.048 l 80 250 600 ppm/ma ppm/ma i sink = 5ma, ltc6652-2.5, ltc6652-3, ltc6652-3.3, ltc6652-4.096, ltc6652-5 l 50 150 450 ppm/ma ppm/ma or d er in f or m ation lead free finish part marking* package description specified temperature range ltc6652ahls8-2.5#pbf ? 665225 8-lead ceramic lcc 5mm 5mm C40c to 125c ltc6652bhls8-2.5#pbf ? 665225 8-lead ceramic lcc 5mm 5mm C40c to 125c consult ltc marketing for parts specifed with wider operating temperature ranges. *the temperature grade is identifed by a label on the shipping container. consult ltc marketing for information on non-standard lead based fnish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifcations, go to: http://www.linear.com/tapeandreel/ ? this product is only offered in trays. for more information go to: http://www.linear.com/packaging/
ltc6652 4 6652fe for more information www.linear.com/6652 e lectrical c haracteristics the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c, v in = v out + 0.5v, unless otherwise noted. note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: if the parts are stored outside of the specifed temperature range, the output may shift due to hysteresis. note 3: temperature coeffcient is measured by dividing the maximum change in output voltage by the specifed temperature range. note 4: load regulation is measured on a pulse basis from no load to the specifed load current. output changes due to die temperature change must be taken into account separately. note 5: excludes load regulation errors. note 6: peak-to-peak noise is measured with a 3-pole highpass at 0.1hz and 4-pole lowpass flter at 10hz. the unit is enclosed in a still-air environment to eliminate thermocouple effects on the leads. the test time is 10 seconds. rms noise is measured on a spectrum analyzer in a shielded environment where the intrinsic noise of the instrument is removed to determine the actual noise of the device. note 7: long-term stability typically has a logarithmic characteristic and therefore, changes after 1000 hours tend to be much smaller than before that time. total drift in the second thousand hours is normally less than one third that of the frst thousand hours with a continuing trend toward reduced drift with time. long-term stability will also be affected by differential stresses between the ic and the board material created during board assembly. note 8: hysteresis in output voltage is created by package stress that differs depending on whether the ic was previously at a higher or lower temperature. output voltage is always measured at 25c, but the ic is cycled to the hot or cold temperature limit before successive measurements. hysteresis is roughly proportional to the square of the temperature change. for instruments that are stored at well controlled temperatures (within 20 or 30 degrees of operational temperature) its usually not a dominant error source. typical hysteresis is the worst-case of 25c to cold to 25c or 25c to hot to 25c, preconditioned by one thermal cycle. note 9: the stated temperature is typical for soldering of the leads during manual rework. for detailed ir refow recommendations, refer to the applications section. parameter conditions min typ max units minimum operating voltage (note 5) i source = 5ma, v out error 0.1% ltc6652-1.25, ltc6652-2.048 ltc6652-2.5, ltc6652-3, ltc6652-3.3, ltc6652-4.096, ltc6652-5 l l 2.7 v out + 0.3v v v output short-circuit current short v out to gnd short v out to v in 16 16 ma ma shutdown pin (shdn) logic high input voltage logic high input current l l 2 0.1 1 v a logic low input voltage logic low input current l l 0.1 0.8 1 v a supply current no load l 350 560 a a shutdown current shdn tied to gnd l 0.1 2 a output voltage noise (note 6) 0.1hz f 10hz ltc6652-1.25 ltc6652-2.048, ltc6652-2.5, ltc6652-3 ltc6652-3.3 ltc6652-4.096 ltc6652-5 10hz f 1khz 2.4 2.1 2.2 2.3 2.8 3 ppm p-p ppm p-p ppm p-p ppm p-p ppm p-p ppm rms turn-on time 0.1% settling, c load = 0 100 s long-term drift of output voltage (note 7) ltc6652ms8 ltc6652ls8 60 20 ppm/khr ppm/khr hysteresis (note 8) ?t = C40c to 125c, ltc6652ms8 ?t = C40c to 85c, ltc6652ms8 ?t = 0c to 70c, ltc6652ms8 ?t = C40c to 125c, ltc6652ls8 ?t = C40c to 85c, ltc6652ls8 ?t = 0c to 70c, ltc6652ls8 80 75 45 45 25 10 ppm ppm ppm ppm ppm ppm
ltc6652 5 6652fe for more information www.linear.com/6652 frequency (khz) 0.01 noise voltage (nv/ hz) 0.1 1 10 6652 g22 300 200 100 0 400 time (1 second/div) output noise (1v/div) 6652 g21 input voltage (v) 0 output voltage (v) 1.2502 1.2504 1.2506 6 10 6652 g18 1.2500 1.2498 2 4 8 12 14 1.2496 1.2494 125c ?40c 25c t ypical p er f or m ance c haracteristics 1.25v load regulation (sinking) 1.25v low frequency 0.1hz to 10hz transient noise 1.25v output voltage noise spectrum 1.25 sinking current without output capacitor 1.25 sinking current with output capacitor 1.25v output voltage temperature drift 1.25v load regulation (sourcing) 1.25v line regulation temperature (c) ?80 reference voltage (v) 1.2500 1.2505 1.2510 40 160 6652 g17 1.2495 1.2490 ?40 0 80 120 3 typical parts output current (ma) 0.1 ?250 ?200 output voltage change (ppm) ?150 ?100 0 1 6652 g19 ?50 10 125c 25c ?40c output current (ma) 0.1 0 output voltage change (ppm) 100 200 300 50 150 250 350 400 1 10 ?40c 125c 6652 g20 25c 500s/div v out 500mv/div c out = 0f i out 1ma 0ma 6652 g23 500s/div v out 500mv/div c out = 1f i out 1ma 0ma 6652 g24 load current (ma) no cap output capacitor 100pf 1nf 10nf 0.1f 1f 10f ?5 ?1 0 5 6652 g16 region of marginal stability 1.25v stability with output capacitance characteristic curves are similar for most l tc6652s. curves from the ltc6652-1.25, ltc6652-2.5 and the ltc6652-5 represent the extremes and typical of the voltage options. characteristic curves for other output voltages fall between these curves and can be estimated based on their output.
ltc6652 6 6652fe for more information www.linear.com/6652 t ypical p er f or m ance c haracteristics 2.5v output voltage temperature drift 2.5v load regulation (sourcing) 2.5v load regulation (sinking) 2.5v supply current vs input voltage 2.5v shutdown current vs input voltage 2.5v minimum v in -v out differential (sourcing) temperature (c) ?50 reference voltage (v) 2.5000 2.5005 2.5010 25 75 150 6652 g01 2.4995 2.4990 2.4985 ?25 0 50 100 125 3 typical parts input voltage (v) 0 output voltage (v) 2.5000 2.5005 2.5010 6 10 6652 g02 2.4995 2.4990 2 4 8 12 14 2.4985 2.4980 125c ?40c 25c output current (ma) 0.1 ?200 output voltage change (ppm) ?180 ?140 ?120 ?100 0 ?60 1 6652 g03 ?160 ?40 ?20 ?80 10 125c 25c ?40c output current (ma) 0.1 0 output voltage change (ppm) 100 200 400 500 600 700 1 10 ?40c 125c 25c 6652 g04 input voltage (v) 0 0 supply current (a) 100 300 400 500 1000 700 4 8 10 6652 g05 200 800 900 600 2 6 12 125c ?40c 14 25c input voltage (v) 0 0 supply current (a) 0.1 0.3 0.4 0.5 1.0 0.7 4 8 10 6652 g06 0.2 0.8 0.9 0.6 2 6 12 14 125c 25c ?40c input-output voltage (v) 0.001 0.01 output current (ma) 1 10 0.01 0.1 1 6652 g09 0.1 25c 125c, ?40c 2.5v line regulation characteristic curves are similar for most l tc6652s. curves from the ltc6652-1.25, ltc6652-2.5 and the ltc6652-5 represent the extremes and typical of the voltage options. characteristic curves for other output voltages fall between these curves and can be estimated based on their output. 2.5v minimum v out -v in differential (sinking) output-input voltage (v) 0.001 output current (ma) 10 0.01 0.1 1 6652 g10 1 0.1 25c ?40c 125c
ltc6652 7 6652fe for more information www.linear.com/6652 t ypical p er f or m ance c haracteristics typical v out distribution for ltc6652-2.5 stability with output capacitance (ltc6652-2.5, ltc6652-3, ltc6652-3.3, ltc6652-4.096, ltc6652-5) 2.5v low frequency 0.1hz to 10hz transient noise 2.5v output voltage noise spectrum time (1 second/div) output noise (1v/div) 6652 g11 frequency (khz) 0.01 noise voltage (nv/ hz) 0.1 1 10 6652 g12 300 200 100 0 600 500 400 output voltage (v) 2.4985 0 number of units 40 60 80 180 140 2.5005 6652 g15 20 160 120 2.4995 2.5015 ltc6652a limits 1004 units load current (ma) no cap output capacitor 100pf 1nf 10nf 0.1f 1f 10f ?5 0 5 6652 g14 region of marginal stability characteristic curves are similar for most l tc6652s. curves from the ltc6652-1.25, ltc6652-2.5 and the ltc6652-5 represent the extremes and typical of the voltage options. characteristic curves for other output voltages fall between these curves and can be estimated based on their output.
ltc6652 8 6652fe for more information www.linear.com/6652 frequency (khz) 0.01 noise voltage (nv/ hz) 0.1 1 10 6652 g32 200 0 1000 800 600 400 time (1 second/div) output noise (5v/div) 6652 g31 input voltage (v) 0 0 supply current (a) 0.1 0.3 0.4 0.5 1.0 0.7 4 8 10 6652 g29 0.2 0.8 0.9 0.6 2 6 12 14 125c ?40c 25c t ypical p er f or m ance c haracteristics 5v shutdown current vs input voltage 5v minimum v in to v out differential (sourcing) 5v low frequency 0.1hz to 10hz transient noise 5v output voltage noise spectrum 5v start-up response without output capacitor 5v output voltage temperature drift 5v supply current vs input voltage 5v line regulation 5v start-up response with output capacitor characteristic curves are similar for most l tc6652s. curves from the ltc6652-1.25, ltc6652-2.5 and the ltc6652-5 represent the extremes and typical of the voltage options. characteristic curves for other output voltages fall between these curves and can be estimated based on their output. input voltage (v) 0 output voltage (v) 6 10 6652 g26 2 4 8 12 14 125c ?40c 25c 5.000 5.001 5.002 4.999 4.998 temperature (c) reference voltage (v) 5.000 5.003 5.005 6652 g25 4.998 4.995 ?50 25 75 150 ?25 0 50 100 125 3 typical parts input voltage (v) 0 0 supply current (a) 100 300 400 500 1000 700 4 8 10 6652 g27 200 800 900 600 2 6 12 14 125c ?40c 25c input-output voltage (v) 0.001 0.01 output current (ma) 1 10 0.01 0.1 1 6652 g30 0.1 25c 125c ?40c 100s/div v out 2v/div v in 2v/div c out = 0f 6652 g33 100s/div v out 2v/div v in 2v/div c out = 1f 6652 g34
ltc6652 9 6652fe for more information www.linear.com/6652 p in functions dnc (pin 1): do not connect. v in (pin 2): power supply. the minimum supply input is v out + 300mv or 2.7v; whichever is higher. the maximum supply is 13.2v. bypassing v in with a 0.1f capacitor to gnd will improve psrr. shdn (pin 3): shutdown input. this active low input powers down the device to <2a. for normal operation tie this pin to v in . gnd (pin 4): device ground. v out (pin 6): output voltage. an output capacitor is not required. for some applications, a capacitor between 0.1f to 10f can be benefcial. see the graphs in the typical performance characteristics section for further details. gnd (pins 5,7,8): internal function. ground these pins. t ypical p er f or m ance c haracteristics characteristic curves are similar for most l tc6652s. curves from the ltc6652-1.25, ltc6652-2.5 and the ltc6652-5 represent the extremes and typical of the voltage options. characteristic curves for other output voltages fall between these curves and can be estimated based on their output. power supply rejection ratio vs frequency output impedance vs frequency frequency (khz) 0.01 ?60 power supply rejection ratio (db) ?50 ?40 ?30 ?20 0.1 1 10 100 1000 6652 g07 ?70 ?80 ?90 ?100 ?10 0 c out = 0f c out = 1f c out = 10f frequency (khz) 1 output impedance () 10 100 0.01 1 10 100 6652 g08 0.1 0.1 c out = 0f c out = 1f c out = 10f shdn input voltage thresholds vs v in v in (v) 2 v trip (v) 1.5 2.0 0.5 1.0 2.5 6 10 6652 g13 4 8 12 14 0 v th(dn) v th(up)
ltc6652 10 6652fe for more information www.linear.com/6652 bypass and load capacitors the ltc6652 voltage references do not require an input capacitor, but a 0.1f capacitor located close to the part improves power supply rejection. the ltc6652 voltage references are stable with or without a capacitive load. for applications where an output capaci- tor is benefcial, a value of 0.1f to 10f is recommended depending on load conditions. the typical performance characteristics section includes a plot illustrating a region of marginal stability. either no or low value capacitors for any load current are acceptable. for loads that sink current or light loads that source current, a 0.1f to 10f capacitor has stable operation. for heavier loads that source current a 0.5f to 10f capacitor range is recommended. the transient response for a 0.5v step on v in with and without an output capacitor is shown in figures 2 and 3, respectively. the ltc6652 references with an output of 2.5v and above are guaranteed to source and sink 5ma. the 1.25v and 2.048v versions are guaranteed to source 5ma and sink 1ma. the test circuit for transient load step response is shown in figure 1. figures 4 and 5 show a 5ma source and sink load step response without a load capacitor, respectively. start-up the start-up characteristic of the ltc6652 is shown in figures 8 and 9. note that the turn-on time is affected by the value of the output capacitor. b lock diagra m a pplications i n f or m ation v in shdn gnd v out 6652 bd bandgap 3 6 2 4 ? + figure 1. transient load test circuit v in 3v 2, 3 6 100 4, 5, 7, 8 c in 0.1f c out 1f v gen 0.5v 6652 f01 ltc6652-2.5
ltc6652 11 6652fe for more information www.linear.com/6652 a pplications i n f or m ation figure 2. transient response without output capacitor figure 3. transient response with 1f output capacitor figure 5. ltc6652-2.5 sinking current without output capacitor figure 6. ltc6652-2.5 sourcing current with output capacitor figure 4. ltc6652-2.5 sourcing current without output capacitor figure 7. ltc6652-2.5 sinking current with output capacitor 3.5v 3v v out 500mv/div 500s/div 6652 f02 c out = 0f v in 5ma 0ma v out 200mv/div 250s/div 6652 f05 c out = 0f i out 3.5v 3v v out 500mv/div 500s/div 6652 f03 c out = 1 f v in v out 200mv/div 250s/div 6652 f06 c out = 1 f 0ma ?5ma i out 0ma ?5ma v out 200mv/div 250s/div 6652 f04 c out = 0f i out 5ma 0ma v out 50mv/div 250s/div 6652 f07 c out = 1 f i out
ltc6652 12 6652fe for more information www.linear.com/6652 a pplications i n f or m ation figure 8. start-up response without output capacitor figure 9. start-up response with 1f output capacitor figure 10. open-drain shutdown circuit figure 11. shutdown response with 5ma load in figure 8, ripple momentarily appears just after the leading edge of powering on. this brief one time event is caused by calibration circuitry during initialization. when an output capacitor is used, the ripple is virtually undetect- able as shown in figure 9. shutdown mode shutdown mode is enabled by tying shdn low which places the part in a low power state (i.e., <2a). in shut - down mode, the output pin takes the value 20k ? (rated output voltage). for example, an ltc6652-2.5 will have an output impedance of 20k ? 2.5 = 50k. for normal operation, shdn should be greater than or equal to 2.0v. for use with a microcontroller, use a pull-up resistor to v in and an open-drain output driver as shown in figure 10. the ltc6652s response into and out of shutdown mode is shown in figure 11. the trip thresholds on shdn have some dependence on the voltage applied to v in as shown in the typical performance characteristics section. be careful to avoid leaving shdn at a voltage between the thresholds as this will likely cause an increase in supply current due to shoot-through current. v in 2v/div v out 1v/div 100s/div 6652 f08 c out = 0f 2.8v v in 13.2v v out to c c1 1f c2 1f r1 20k 6652 f10 ltc6652-2.5 shdn 2n7002 v out v in gnd v in 2v/div v out 1v/div 100s/div 6652 f09 c out = 1 f shdn 1v/div v out 1v/div 1ms/div 6652 f11 i load = 5ma
ltc6652 13 6652fe for more information www.linear.com/6652 a pplications i n f or m ation figure 12a. ms8 long-term drift long-term drift long-term drift cannot be extrapolated from accelerated high temperature testing. this erroneous technique gives drift numbers that are wildly optimistic. the only way long-term drift can be determined is to measure it over the time interval of interest. the ltc6652 long-term drift data was collected on more than 100 parts that were sol- dered into pc boards similar to a real world application. the boards were then placed into a constant temperature oven with t a = 35c, their outputs were scanned regularly and measured with an 8.5 digit dvm. long-term drift is shown below in figure 12. figure 12b. ls8 long-term drift hysteresis the hysteresis data shown in figure 13 represents the worst-case data collected on parts from C 40c to 125c. the output is capable of dissipating relatively high power, i.e., for the ltc6652-2.5, p d = 10.7v ? 5.5ma = 58.85mw. the thermal resistance of the ms8 package is 200c/w and this dissipation causes a 11.8c internal rise. this could increase the junction temperature above 125c and may cause the output to shift due to thermal hysteresis. figure 13a. ms8 hysteresis plot C40c to 125c figure 13b. ls8 hysteresis plot C40c to 125c hours 0 ppm 60 80 600 6652 f12b 40 ?20 20 200 400 800 1000 ?40 0 ltc6652-2.5 ls8 package 4 typical parts t a = 30c hours 0 ppm 60 80 900 6652 f12a 40 ?20 20 300 600 1200 1500 ?40 0 ltc6652-2.5 ms8 package 3 typical parts t a = 35c distribution (ppm) ?110 ?80 ?50 ?20 0 5020 80 0 number of units 2 3 4 5 9 7 6652 f13b 8 6 110 1 25c to 125c to 25c 25c to ?40c to 25c distribution (ppm) ?250 ?150 ?50 0 number of units 5 10 15 35 25 6652 f13a 30 20 150 50 25c to 125 c to 25 c 25 c to ?40 c to 25 c
ltc6652 14 6652fe for more information www.linear.com/6652 figure 14. lead-free refow profle pc board layout the mechanical stress of soldering a surface mount volt - age reference to a pc board can cause the output voltage to shift and temperature coeffcient to change. these two changes are not correlated. for example, the voltage may shift, but the temperature coeffcient may not. to reduce the effects of stress-related shifts, mount the reference near the short edge of the pc board or in a corner. in addition, slots can be cut into the board on two sides of the device. the capacitors should be mounted close to the package. the gnd and v out traces should be as short as possible to minimize i ? r drops. excessive trace resistance directly impacts load regulation. ir refow shift the different expansion and contraction rates of the materi- als that make up the lead-free ltc6652 package cause the output voltage to shift after undergoing ir refow. lead-free refow profles reach over 250c, considerably more than their leaded counterparts. the lead-free ir refow profle used to experimentally measure output voltage shift in the ltc6652-2.5 is shown in figure 14. similar results can be a pplications i n f or m ation expected using a convection refow oven. in our experiment, the serialized parts were run through the refow process twice. the results indicate that the standard deviation of the output voltage increases with a slight positive mean shift of 0.003% as shown in figure 15. while there can be up to 0.016% of output voltage shift, the overall drift of the ltc6652 after ir refow does not vary signifcantly. power dissipation power dissipation in the ltc6652 is dependent on v in , load current, and package. the ltc6652 package has a thermal resistance, or ja , of 200c/w. a curve that illustrates allowed power dissipation vs temperature for this package is shown in figure 16. the power dissipation of the ltc6652-2.5v as a function of input voltage is shown in figure 17. the top curve shows power dissipation with a 5ma load and the bottom curve shows power dissipation with no load. when operated within its specifed limits of v in = 13.2v and sourcing 5ma, the ltc6652-2.5 consumes just under 60mw at room temperature. at 125c the quiescent cur - rent will be slightly higher and the power consumption increases to just over 60mw . the power-derating curve in figure 16 shows the ltc6652-2.5 can safely dissipate 125mw at 125c about half the maximum power con - sumption of the package. humidity sensitivity plastic mould compounds absorb water. with changes in relative humidity, plastic packaging materials change the amount of pressure they apply to the die inside, which can cause slight changes in the output of a volt- age reference, usually on the order of 100ppm. the ls8 package is hermetic, so it is not affected by humidity, and is therefore more stable in environments where humidity may be a concern. 0 2 4 6 minutes 8 0 75 150 225 300 6652 f14 10 120s 40s t p 30s t p = 260c ramp down ramp to 150c t s = 190c t = 150c t l 130s t l = 217c t s(max) = 200c 380s
ltc6652 15 6652fe for more information www.linear.com/6652 a pplications i n f or m ation figure 16. maximum recommended dissipation for ltc6652 figure 17. typical power dissipation of the ltc6652 temperature ( c) 0 0 dissipation (w) 0.2 0.6 0.1 80 0.7 6652 f16 0.4 0.3 0.5 40 20 100 120 60 140 v in (v) 2 0 power (w) 0.01 0.03 0.04 0.05 0.06 6652 f17 0.02 6 4 10 12 8 14 t a = 25c 5ma load no load figure 15a. ms8 output voltage shift due to ir refow output voltage shift due to ir reflow (%) ?0.014 ?0.006 0 number of units 4 2 6 10 8 6652 f15a 0.018 0.010 0.002 output voltage shift due to ir reflow (%) ?0.1 ?0.02 ?0.06 0 number of units 3 2 1 5 4 7 6 6652 f15b 0.1 0.06 0.020 1x 3x figure 15b. ls8 output voltage shift due to ir refow
ltc6652 16 6652fe for more information www.linear.com/6652 t ypical a pplications extended supply range reference extended supply range reference boosted output current 4v to 30v v out bzx84c18 c1 0.1f c2 optional r1 6652 ta02 ltc6652-2.5 v out v in gnd shdn 6v to 160v v out bzx84c18 c1 0.1f c2 optional r1 330k on semi mmbt5551 r2 4.7k 6652 ta03 ltc6652-2.5 v out v in gnd shdn v + (v out + 1.8v) v out c1 1f c2 1f r1 220? 6652 ta04 ltc6652-2.5 2n2905 v out v in gnd shdn negative rail circuit v ee ?3v v cc 1.75v v out ?2.5v 4, 5, 7, 8 2, 3 6 1f 500 6652 ta06 c1 0.1f ltc6652-2.5
ltc6652 17 6652fe for more information www.linear.com/6652 p ackage description ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660 rev f) msop (ms8) 0307 rev f 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ? 0.38 (.009 ? .015) typ 0.1016 0.0508 (.004 .002) 0.86 (.034) ref 0.65 (.0256) bsc 0 ? 6 typ detail ?a? detail ?a? gauge plane 1 2 3 4 4.90 0.152 (.193 .006) 8 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc6652 18 6652fe for more information www.linear.com/6652 p ackage description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. ls8 package 8-leadless chip carrier (5mm 5mm) (reference ltc dwg # 05-08-1852 rev ?) 7 8 1 3 4 2 2.00 ref r0.20 ref 6 5 7 8 6 5 1 2 3 4 4.20 0.10 4.20 sq 0.10 2.54 0.15 1.00 typ 0.64 typ ls8 0609 rev ? r0.20 ref 0.95 0.10 1.45 0.10 0.10 typ 0.70 typ 1 4 7 8 6 5 1.50 0.15 2.50 0.15 2.54 0.15 0.70 0.05 package outline 5.00 sq 0.15 5.00 sq 0.15 5.80 sq 0.15 apply solder mask to areas that are not soldered note: 1. all dimensions are in millimeters 2. drawing not to scale 3. dimensions package do not include plating burrs plating burrs, if present, shall not exceed 0.30mm on any side 4. plating?electo nickel min 1.25um, electro gold min 0.30um 5. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (see note 5) 2 3 ls8 package 8-pin leadless chip carrier (5mm 5mm) (reference ltc dwg # 05-08-1852 rev ?)
ltc6652 19 6652fe for more information www.linear.com/6652 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h istory rev date description page number c 11/09 change to typical performance characteristics. change to typical application. 6 14 d 8/12 addition of 5mm 5mm hermetic ls8 package. update to electrical characteristics to include ls8 package. addition of long term drift, hysteresis, ir drift plots for ls8 package. addition of humidity sensitivity information. 1, 2, 3, 12, 18 4 13, 15 14 e 1/13 correction to pin labeling of ls8 package 2 (revision history begins at rev c)
ltc6652 20 6652fe for more information www.linear.com/6652 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 ? linear technology corporation 2007 lt 0113 rev e ? printed in usa (408) 432-1900 fax : (408) 434-0507 www.linear.com/6652 t ypical a pplication part number description comments lt1460 micropower series references 0.075% max, 10ppm/c max, 20ma output current lt1461 micropower series low dropout 0.04% max, 3ppm/c max, 50ma output current lt1790 micropower precision series references 0.05% max, 10ppm/c max, 60a supply, sot23 package lt6650 micropower reference with buffer amplifer 0.5% max, 5.6a supply, sot23 package lt6660 tiny micropower series reference 0.2% max, 20ppm/c max, 20ma output current, 2mm 2mm dfn lt6654 precision wide supply high output drive low noise reference 0.05% max, 10ppm/c max, 10ma output current, 1.6ppm p-p noise in sot23 and ls8 packages improved reference supply rejection in a data converter application r elate d p arts v out c out 1f c1 0.1f c2 10f r1 50k 6652 ta05 ltc6652 data 16 d out shdn v1 v2 v3 v4 v in v cc ref gnd gnd refgnd d/a vdac a/d 16 ltc1657 ltc1605

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